/*
 * SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2024 Napatech A/S
 */


#include "nthw_fpga_mod_str_map.h"
const struct nthw_fpga_mod_str_s sa_nthw_fpga_mod_str_map[] = {
	{ MOD_CAT, "CAT" },
	{ MOD_CPY, "CPY" },
	{ MOD_CSU, "CSU" },
	{ MOD_DBS, "DBS" },
	{ MOD_FLM, "FLM" },
	{ MOD_GFG, "GFG" },
	{ MOD_GMF, "GMF" },
	{ MOD_GPIO_PHY, "GPIO_PHY" },
	{ MOD_HFU, "HFU" },
	{ MOD_HIF, "HIF" },
	{ MOD_HSH, "HSH" },
	{ MOD_I2CM, "I2CM" },
	{ MOD_IFR, "IFR" },
	{ MOD_IGAM, "IGAM" },
	{ MOD_IIC, "IIC" },
	{ MOD_INS, "INS" },
	{ MOD_KM, "KM" },
	{ MOD_MAC_PCS, "MAC_PCS" },
	{ MOD_PCIE3, "PCIE3" },
	{ MOD_MAC_RX, "MAC_RX" },
	{ MOD_MAC_TX, "MAC_TX" },
	{ MOD_PCI_RD_TG, "PCI_RD_TG" },
	{ MOD_PCI_TA, "PCI_TA" },
	{ MOD_PCI_WR_TG, "PCI_WR_TG" },
	{ MOD_PCIE3, "PCIE3" },
	{ MOD_PCM_NT400DXX, "PCM_NT400DXX" },
	{ MOD_PDB, "PDB" },
	{ MOD_PDI, "PDI" },
	{ MOD_PHY_TILE, "PHY_TILE" },
	{ MOD_PRM_NT400DXX, "PRM_NT400DXX" },
	{ MOD_QSL, "QSL" },
	{ MOD_RAC, "RAC" },
	{ MOD_RFD, "RFD" },
	{ MOD_RMC, "RMC" },
	{ MOD_RPF, "RPF" },
	{ MOD_RPL, "RPL" },
	{ MOD_RPP_LR, "RPP_LR" },
	{ MOD_RST9563, "RST9563" },
	{ MOD_RST9574, "RST9574" },
	{ MOD_SDC, "SDC" },
	{ MOD_SLC_LR, "SLC_LR" },
	{ MOD_SLC, "SLC" },
	{ MOD_SPIM, "SPIM" },
	{ MOD_SPIS, "SPIS" },
	{ MOD_STA, "STA" },
	{ MOD_TINT, "TINT" },
	{ MOD_TSM, "TSM" },
	{ MOD_TX_CPY, "TX_CPY" },
	{ MOD_TX_INS, "TX_INS" },
	{ MOD_TX_RPL, "TX_RPL" },
	{ 0UL, NULL }
};
